Interconnect Analysis and Synthesis

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Chung-Kuan Cheng (University of California at San Diego) John Lillis (University of Illinois at Chicago)

Interconnect Analysis and Synthesis

Chung-Kuan Cheng (University of California at San Diego), John Lillis (University of Illinois at Chicago), Shen Lin (Hewlett-Packard) , Norman Chang (Hewlett-Packard)

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English

Wiley-Interscience
20 October 1999

Communications engineering & telecommunications; Maintenance & repairs; Signal processing

State-of-the-art methods and current perspectives on interconnect The irrepressible march toward smaller and faster integrated circuits has made interconnect a hot topic for semiconductor research. The effects of wire size, topology construction, and network design on system performance and reliability have all been thoroughly investigated in recent years. Interconnect Analysis and Synthesis provides CAD researchers and engineers with powerful, state-of-the-art tools for the analysis, design, and optimization of interconnect. It brings together a wealth of information previously scattered throughout the literature, explaining in depth available analysis techniques and presenting a range of CAD algorithms for synthesizing and optimizing interconnect. Along with examples and results from the semiconductor industry and 150 illustrations, this practical work features:

Models for interconnect as well as devices and the impact of scaling trends Modern analysis techniques, from matrix reduction and moment matching to transmission-line analysis An overview of the effects of inductance on on-chip interconnect Flexible CAD algorithms that can be generalized for different needs, from buffer insertion to wire sizing to routing topology Emphasis on realistic problem formulations, addressing key design tradeoffs such as those between area and performance

By: Chung-Kuan Cheng (University of California at San Diego), John Lillis (University of Illinois at Chicago), Shen Lin (Hewlett-Packard), Norman Chang (Hewlett-Packard)
Imprint: Wiley-Interscience
Country of Publication: United States
Dimensions: Height: 246mm, Width: 161mm, Spine: 20mm
Weight: 522g
ISBN: 9780471293668
ISBN 10: 0471293660
Pages: 262
Publication Date: 20 October 1999
Audience: College/higher education , Professional and scholarly , Professional & Vocational , A / AS level , Further / Higher Education
Format: Hardback
Publisher's Status: Active

Interconnect Models. Device Models. Interconnect Analysis. Inductance and Inductive Coupling for On-chip Interconnect. Synthesis: Overview and Static Topology Optimization. Global Routing Topology Synthesis. Optimization of Multi-Source Nets. Timing Driven Maze Routing.

Chung-Kuan Cheng is the author of Interconnect Analysis and Synthesis, published by Wiley. John Lillis is the author of Interconnect Analysis and Synthesis, published by Wiley. Shen Lin is the author of Interconnect Analysis and Synthesis, published by Wiley. Norman Chang is the author of Interconnect Analysis and Synthesis, published by Wiley.